1. Field of the Invention
The present invention generally relates to communications between computers in a multi-processor system and, more particularly, to a microcomputer suitable for use in a multi-processor system which facilitates communicating between processors through a memory.
2. Description of the Prior Art
In a multi-processor system including a plurality of microcomputers, data transfer between the microcomputers is necessary. To this end, a dual-port memory capable of being referenced by each of the microcomputers is typically connected between the microcomputers and data is transferred between the microcomputers in such a way that one of the microcomputers reads data from the dual-port memory, which has been written in the dual-port memory by the other microcomputer.
Such a multi-processor microcomputer system will be described in detail with reference to FIGS. 1 and 2. FIG. 1 is a block diagram of an example of a microcomputer system, which is includes two microcomputers 500 and 550 and a dual-port memory 560. The microcomputer 500 and the dual-port memory 560 are connected to each other by a) an external address bus 501 for outputting a memory address with which the microcomputer 500 references or accesses the dual-port memory, b) an external data bus 502 for transferring write/read dam between the microcomputer 500 and the dual-port memory 560, c) an external R/W signal line 503 which indicates whether the memory reference operation of the microcomputer is write ("0" signal level) or is read ("1" signal level), and d) an external strobe (DSTB) signal line 504 for timing write/read to the memory 560 by the microcomputer 500. Similarly, the microcomputer 550 and the dual-port memory 560 are connected to each other by an external address bus 551, an external data bus 552, an external R/W signal line 553 and an external DSTB signal line 554.
Now, an operation of the microcomputer 500 when it accesses the dual-port memory 560 will be described. FIG. 2(a) shows a timing chart for a case where the microcomputer 500 writes data in the dual-port memory 560. The microcomputer 500 outputs "0" (indicating write) to the external R/W signal line 503 at a time instance t.sub.61, and further outputs a) a memory address onto the external address bus 501 for performing a memory write and b) provides data onto the external data bus 502. Then, during a time period t.sub.62 -t.sub.63, a data write is performed to the dual-port memory 560 by outputting an active level "0" to the external DSTB signal line 504.
FIG. 2(b) is a timing chart for a case where the microcomputer 500 reads data from the dual-port memory 560. The microcomputer 500 outputs "1" (indicating read) on the external R/W signal 503 at a time instance t.sub.71, outputs a memory address onto the external address bus 501 for performing a memory read, and puts the external data bus 502 in a high impedance state. Then, during a period t.sub.72 -t.sub.73, data is outputted from the dual-port memory 560 to the external data bus 502 by outputting an active level "0" to the external DSTB signal line 504, and the microcomputer 500 then completes the data read from the dual-port memory 560 by reading the data off external data bus 502. Data read/write of the microcomputer 550 for the dual-port memory 560 is performed using similar procedures. Thus, dam transfer between the microcomputers is performed by accessing the dual-port memory 560 by both microcomputers.
In the conventional microcomputer system as described above, although data transfer is performed between the microcomputers 500 and 550 by the external connection of the dual-port memory 560, the dual-port memory 560 is expensive compared with an ordinary memory, resulting in a substantially increased cost for the system as a whole. Further, since the dual port memory 560 is externally attached, the number of parts increases, causing loss of reliability of the whole system.